forked from LeenkxTeam/Kmake
78 lines
2.9 KiB
C++
78 lines
2.9 KiB
C++
// Copyright 2021 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include "src/wasm/baseline/liftoff-assembler-defs.h"
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#if V8_TARGET_ARCH_IA32
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#include "src/execution/ia32/frame-constants-ia32.h"
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#elif V8_TARGET_ARCH_X64
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#include "src/execution/x64/frame-constants-x64.h"
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#elif V8_TARGET_ARCH_MIPS64
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#include "src/execution/mips64/frame-constants-mips64.h"
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#elif V8_TARGET_ARCH_LOONG64
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#include "src/execution/loong64/frame-constants-loong64.h"
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#elif V8_TARGET_ARCH_ARM
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#include "src/execution/arm/frame-constants-arm.h"
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#elif V8_TARGET_ARCH_ARM64
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#include "src/execution/arm64/frame-constants-arm64.h"
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#elif V8_TARGET_ARCH_S390X
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#include "src/execution/s390/frame-constants-s390.h"
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#elif V8_TARGET_ARCH_PPC64
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#include "src/execution/ppc/frame-constants-ppc.h"
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#elif V8_TARGET_ARCH_RISCV32 || V8_TARGET_ARCH_RISCV64
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#include "src/execution/riscv/frame-constants-riscv.h"
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#endif
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#include "src/wasm/baseline/liftoff-register.h"
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#include "testing/gtest/include/gtest/gtest.h"
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namespace v8 {
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namespace internal {
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namespace wasm {
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// The registers used by Liftoff and the registers spilled by the
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// WasmDebugBreak builtin should match.
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static_assert(kLiftoffAssemblerGpCacheRegs ==
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WasmDebugBreakFrameConstants::kPushedGpRegs);
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static_assert(kLiftoffAssemblerFpCacheRegs ==
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WasmDebugBreakFrameConstants::kPushedFpRegs);
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class WasmRegisterTest : public ::testing::Test {};
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TEST_F(WasmRegisterTest, SpreadSetBitsToAdjacentFpRegs) {
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LiftoffRegList input(
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// GP reg selection criteria: an even and an odd register belonging to
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// separate adjacent pairs, and contained in kLiftoffAssemblerGpCacheRegs
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// for the given platform.
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#if V8_TARGET_ARCH_S390X || V8_TARGET_ARCH_PPC64 || V8_TARGET_ARCH_LOONG64
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LiftoffRegister::from_code(kGpReg, 4),
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LiftoffRegister::from_code(kGpReg, 7),
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#elif V8_TARGET_ARCH_RISCV32 || V8_TARGET_ARCH_RISCV64
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LiftoffRegister::from_code(kGpReg, 10),
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LiftoffRegister::from_code(kGpReg, 13),
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#else
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LiftoffRegister::from_code(kGpReg, 1),
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LiftoffRegister::from_code(kGpReg, 2),
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#endif
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LiftoffRegister::from_code(kFpReg, 1),
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LiftoffRegister::from_code(kFpReg, 4));
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// GP regs are left alone, FP regs are spread to adjacent pairs starting
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// at an even index: 1 → (0, 1) and 4 → (4, 5).
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#if V8_TARGET_ARCH_RISCV32 || V8_TARGET_ARCH_RISCV64 || V8_TARGET_ARCH_IA32
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// RISCV and ia32 don't have code 0 in kLiftoffAssemblerFpCacheRegs
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LiftoffRegList expected =
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input | LiftoffRegList(LiftoffRegister::from_code(kFpReg, 5));
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#else
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LiftoffRegList expected =
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input | LiftoffRegList(LiftoffRegister::from_code(kFpReg, 0),
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LiftoffRegister::from_code(kFpReg, 5));
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#endif
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LiftoffRegList actual = input.SpreadSetBitsToAdjacentFpRegs();
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EXPECT_EQ(expected, actual);
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}
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} // namespace wasm
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} // namespace internal
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} // namespace v8
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